Super capacitor battery hybridization with high power density bidirectional converter

03/02/2015
Auteurs : Michel Jamot
OAI : oai:www.see.asso.fr:10638:20119
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Super capacitor battery hybridization with high power density bidirectional converter

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Super capacitor battery hybridization with high power density bidirectional converter Michel JAMOT AIRBUS HELICOPTERS Electrical power and lighting department Marignane, France michel.jamot@airbus.com Abstract This paper presents an optimization of the electrical starting system of a helicopter engine. The proposed improvement introduces the super capacitor technology to assist the batteries especially when they have to provide high peak power. Various strategies of batteries hybridization are discussed leading to the introduction of a bidirectional DC-DC converter for optimized energy management. The aim of this converter is to charge the super capacitor and to maintain the helicopter voltage network at the right level in order to provide the required starting torque to the engine and for the various consumers. As a lightweight converter is needed, the non-insulated buck-boost topology is selected. Considering the high current levels (hundreds of amps) the basic topology is optimized by using multiphase interleaving, high switching frequency and MOSFET synchronous rectification. Helicopter; super capacitors; hybridization; Buck-Boost; bidirectional converter; synchronous rectification; I. Introduction Optimizing the weight of embedded systems on board helicopters is a major issue to improve performance and reducing CO² emissions. Nowadays, on light and mid weight helicopters, engine starting and 28Vdc generation is most of the time ensured by a starter generator (S/G) which is usually a conventional dc brushed machine. Engine starting has a large contribution on battery sizing due to torque requirements of the engine especially in cold weather (negative temperatures) when turbine drag torque is maximum and battery performance is low. In this paper, super capacitor (SCAP) technology is proposed to assist the batteries during the starting phase of the engine in order to optimize the overall weight and performance of the embedded system. Benefit of the SCAP technology is its capacity to provide high power energy even at low temperature (down to -40°C) as they store energy electrostatically. (on the other hand, batteries rely on a chemical reaction which is intrinsically limited at low temperature). Moreover, a bidirectional DC-DC converter is introduced in the architecture in order to manage conveniently the energy transfers between the SCAP and the batteries. Work presented in this paper is protected through the Airbus Helicopters patent 09-02942 (improvement of H/C engine starting with super capacitors) II. Hybridization architecture Different architectures have been regarded to assist the battery with the SCAP: In pure parallel hybridization, the recoverable energy of the SCAP is low due to the limited discharge voltage range required for torque performance of the DC brushed machine. SCAP energy is given by the equation: = ( − ). A voltage range from 28V to 22V, compatible with S/G expected torque performances, allows only 38% of recoverable energy leading to an inacceptable oversizing of the SCAP bank. SCAP Battery Starter Engine LV bus (28Vdc) Charger Fig. 1: Direct parallel hybridization Serial hybridization is more efficient allowing complete energy recovery of the SCAP and providing direct extra voltage to the S/G which is very beneficial for electromagnetic torque delivery. On the other hand this architecture is very intrusive to enhance existing electrical systems on H/C as the SCAP has to be fitted between the S/G and the battery during the starting phase then disconnected during the generating phase. Charger The proposed architecture is an enhancement of the parallel hybridization DC converter which allows the SCAP stored energy. The proposed bidirectional in two modes: Charging mode: the energy is transferred from bus to the SCAP Discharge transferred to the LV bus in order to maintain the voltage at the right level so that the the expected To be noticed that as the converter must be sized for high current in boost mode it high speed charge of the SCAP at no extra cost. Charge mode Boost mode Fig. 3 III. In order to answer to weight and cost the helicopter market converter i have been rejected; a topology is selected SCAP Starter Charger Fig. 2: Serial The proposed architecture is an enhancement of the hybridization by C converter which allows the SCAP stored energy. proposed bidirectional in two modes: Charging mode: the energy is transferred from bus to the SCAP Discharge mode: the overall energy of the SCAP is transferred to the LV bus in order to maintain the at the right level so that the the expected torque. noticed that as the converter must be sized for high current in boost mode it high speed charge of the SCAP at no extra cost. Charge mode Boost mode Bidirectional DC-DC converter SCAP Fig. 3: Optimized parallel hybridization Converter topology In order to answer to weight and cost the helicopter market converter i have been rejected; a gy is selected. Battery Engine LV bus Serial hybridization The proposed architecture is an enhancement of the by inserting a bidirectional DC C converter which allows recovering the SCAP stored energy. proposed bidirectional DC-DC converter Charging mode: the energy is transferred from : the overall energy of the SCAP is transferred to the LV bus in order to maintain the at the right level so that the noticed that as the converter must be sized for high current in boost mode it can provide high speed charge of the SCAP at no extra cost. Starter Bidirectional DC converter Optimized parallel hybridization Converter topology In order to answer to weight and cost the helicopter market converter insulated topologies have been rejected; a conventio Engine LV bus (28Vdc) hybridization The proposed architecture is an enhancement of the a bidirectional DC recovering nearly 100% of converter operates Charging mode: the energy is transferred from the LV : the overall energy of the SCAP is transferred to the LV bus in order to maintain the at the right level so that the S/G can deliver noticed that as the converter must be sized for can provide intrinsically high speed charge of the SCAP at no extra cost. Starter Turbine LV bus (28Vdc Battery Optimized parallel hybridization In order to answer to weight and cost constraint sulated topologies conventional buck-boost The proposed architecture is an enhancement of the a bidirectional DC- nearly 100% of operates the LV : the overall energy of the SCAP is transferred to the LV bus in order to maintain the can deliver noticed that as the converter must be sized for intrinsically Turbine Vdc) constraints of sulated topologies boost Fig. 4 The converter whole range of the LV bus In this mode with D In b with Q1 In boost mode high duty cycle allow to discharge the SCAP as low thus reco Virtually, are implemented and operating in mode in order to decrease rms current in the capacitor (C) and the ripple current in the super capacitor. Moreover rectification mode in order to decrease dramatically the conduction losses ID product is much smaller than the forward voltage of the The controller is based on control [4] i the converter. One high speed current loop converter phase allows accurate current balancing between channels while semi overshoots. In addition, these inner high stability of the because they eli loop to a sin Fig. 5: Charge mode Boost mode SCAP IL_sense L Fig. 4: DC-DC converter topology The SCAP bank rated voltage is converter can opera whole range of the LV bus this mode the transfer function is given by: with D the duty cycle In boost mode the transfer with Q1 being the master switch. boost mode high duty cycle allow to discharge the SCAP as low thus recovering almost the whole stored energy. Virtually, four stages are implemented and operating in mode in order to decrease rms current in the capacitor (C) and the ripple current in the super capacitor. Moreover the converter rectification mode in order to decrease dramatically the conduction losses ID product is much smaller than the forward voltage of the anti-parallel IV. Converter The controller is based on control [4] in order to achieve reliability the converter. One high speed current loop converter phase allows accurate current balancing between channels while semi-conductors overshoots. In addition, these inner high stability of the because they eliminate the inductor (L) from the loop (one order less in the small signal model leading to a single pole open loop) Fig. 5: Principle Q1 Q2 sense L C DC converter topology SCAP bank rated voltage is operate in buck whole range of the LV bus voltage. transfer function is given by: = duty cycle of Q2 being oost mode the transfer function = 1 − the master switch. boost mode high duty cycle allow to discharge the SCAP as low vering almost the whole stored energy. four stages (or phase) as shown in figure 4 are implemented and operating in mode in order to decrease rms current in the capacitor (C) and the ripple current in the super the converter operates in synchronous rectification mode in order to decrease dramatically the conduction losses of the MOSFET as ID product is much smaller than the forward voltage parallel intrinsic diode. Converter control The controller is based on the n order to achieve reliability the converter. One high speed current loop converter phase allows accurate current balancing between channels while protecting efficiently the thanks to In addition, these inner current high stability of the imbricated minate the inductor (L) from the order less in the small signal model leading le pole open loop). le of the average current mode control LV bus Battery Starter Engine DC converter topology (one phase shown) SCAP bank rated voltage is selected so that in buck (charge) mode voltage. transfer function is given by: being the master function is given by: − the master switch. boost mode high duty cycle ratios (up to allow to discharge the SCAP as low as one vering almost the whole stored energy. (or phase) as shown in figure 4 are implemented and operating in parallel interleaving mode in order to decrease rms current in the capacitor (C) and the ripple current in the super operates in synchronous rectification mode in order to decrease dramatically of the MOSFET as the ID product is much smaller than the forward voltage intrinsic diode. control the average current n order to achieve reliability and the converter. One high speed current loop converter phase allows accurate current balancing protecting efficiently the the lack of current current control loops imbricated loops minate the inductor (L) from the order less in the small signal model leading verage current mode control LV bus (28Vdc) Battery Engine (one phase shown) so that the mode on the transfer function is given by: master switch. is given by: (up to ≈ 95%) as one volt and vering almost the whole stored energy. (or phase) as shown in figure 4 interleaving mode in order to decrease rms current in the capacitor (C) and the ripple current in the super operates in synchronous rectification mode in order to decrease dramatically the Rdson x ID product is much smaller than the forward voltage average current mode and stability of the converter. One high speed current loop for each converter phase allows accurate current balancing protecting efficiently the lack of current loops provide regulation minate the inductor (L) from the outer order less in the small signal model leading verage current mode control Outers control loops are not described in this paper as a patent application is V. 1) Power circuit electrical technologies The demonstrator is designed for of the H/C The SCAP 500A respectivel size the converter for 75V-1,8m for optimiz FET are surface mounted on the metal can through a thin mechanical frame of the converter. leads to a thermal IMS mounted D²PACK w according to the power to be dissipated by the MOSFET. This solution is an technology mechanical advantage is the use of a multilayer power PCB including low inductance power trace and drivers circu Fig. 6: Direct FET TM mounted on power PCB Fig. 7: Foot print of Each converter phase is MOSFET Inductors interconn The demonst side in order to be compl requirements The EMC filter includes mode stages core and Outers control loops are not described in this paper a patent application is Demonstrator Power circuit electrical technologies demonstrator is designed for of the H/C LV bus voltage from 20 to 30V. SCAP current can reach more than 100A and respectively in buck and boost size the converter for 8KW peak power. 1,8mΩ Direct FET for optimized losses, weight and volume. The are surface mounted on the metal can technology allow through a thin (about 1mm) mechanical frame of the converter. leads to a thermal resistance about twice IMS mounted D²PACK w g to the power to be dissipated by the MOSFET. This solution is an interesting technology procuring a similar mechanical environment of the helicopter. advantage is the use of a multilayer power PCB including low inductance power trace and drivers circuits. : Direct FET TM mounted on power PCB Foot print of Direct FET Each converter phase is MOSFET operating at 100 kHz Inductors are based on planar technology nection based on bus The demonstrator include side in order to be compl requirements (visible on the right of fig 11 The EMC filter includes mode stages based respectively on high f core and high permeability Outers control loops are not described in this paper a patent application is pending. Demonstrator implementation Power circuit electrical main demonstrator is designed for a nominal operation voltage from 20 to 30V. current can reach more than 100A and buck and boost 8KW peak power. Direct FETTM (Fig 7) have been weight and volume. The are surface mounted on the power technology allows the top out 1mm) thermal pad mechanical frame of the converter. resistance about twice IMS mounted D²PACK which remains acceptable g to the power to be dissipated by the interesting alternative to the IMS a similar reliability in the harsh onment of the helicopter. advantage is the use of a multilayer power PCB including low inductance power trace : Direct FET TM mounted on power PCB Direct FETTM on Each converter phase is built with paralleled 100 kHz switching are based on planar technology ection based on bus bars. tor includes an EMC filter side in order to be compliant wit (visible on the right of fig 11 The EMC filter includes differential and common based respectively on high f ability Nano cry Outers control loops are not described in this paper implementation main features nominal operation voltage from 20 to 30V. current can reach more than 100A and buck and boost mode leading to 8KW peak power. have been selected weight and volume. The direct power PCB, their the top side cooling thermal pad (Fig 8) to mechanical frame of the converter. This solution resistance about twice that of an ich remains acceptable g to the power to be dissipated by the ternative to the IMS reliability in the harsh onment of the helicopter. advantage is the use of a multilayer power PCB including low inductance power traces, bus capacitor : Direct FET TM mounted on power PCB on the thermal pad built with paralleled switching frequency. are based on planar technology for easy an EMC filter on LV bus ant with DO160 EMC (visible on the right of fig 11). differential and common based respectively on high flux powder stalline core. Outers control loops are not described in this paper and nominal operation current can reach more than 100A and leading to selected direct PCB, their cooling to the This solution that of an ich remains acceptable g to the power to be dissipated by the ternative to the IMS reliability in the harsh One advantage is the use of a multilayer power PCB , bus capacitors pad built with paralleled frequency. for easy on LV bus h DO160 EMC differential and common lux powder The control stage in based on mixed anal digital technologies Analogue technology allows easy implementation of the high embed converter protection management... After concept validation prototype has been designed and bui with internal layout, TRL5 maturity level. figures 8, 9 and 10 The main physical characteri peak 2) Control and protection stage The control stage in based on mixed anal digital technologies Analogue technology allows easy implementation of the high frequen embeds most of the function converter protection management... 3) The DC- After concept validation prototype has been designed and bui with TFE Electronics Company internal layout, volume and weight and TRL5 maturity level. figures 8, 9 and 10 Fig. 8: DC e main physical characteri peak module are: • Dimension • Volume : • Weight : Fig. 9: top view of the TRL5 prototype ontrol and protection stage The control stage in based on mixed anal digital technologies. Analogue technology allows easy implementation of frequency current loops as s most of the functions converter protection management... -DC converter demonstra After concept validation with a first TRL prototype has been designed and bui Electronics Company volume and weight and TRL5 maturity level. This demonstrator figures 8, 9 and 10. : DC-DC converter assembly e main physical characteris module are: Dimensions: 288 x 178 x 80 (mm) Volume : ≈ 4 dcm 3 Weight : 3,8 kg : top view of the TRL5 prototype ontrol and protection stage The control stage in based on mixed anal Analogue technology allows easy implementation of current loops as the PFGA such PWM generation, converter protection management... DC converter demonstrator a first TRL4 mock prototype has been designed and built in par Electronics Company in order to optimiz volume and weight and to demonstrator is shown in converter assembly stics of the 500A 288 x 178 x 80 (mm) : top view of the TRL5 prototype The control stage in based on mixed analogue and Analogue technology allows easy implementation of the PFGA such PWM generation, tor 4 mock-up, a t in partnership in order to optimize to reach a is shown in converter assembly 500A - 8kW : top view of the TRL5 prototype Fig. 10: bottom view of the TRL5 prototype VI. DC-DC converter results Converter heating during charge and boost phases is rather less than predicted giving margins for further weight reduction. An analysis is to be done in order to define accurately the origin of the gap (losses or thermal capacity) Environment tests have been performed in accordance with TRL5-6 targeted level: Functional tests have shown good results being performed with an ambient temperature from -40°C to +70°C. The converter passed with success the typical H/C vibration tests (operational and endurance levels) showing especially that the direct FET cooling concept was mature enough to be kept on a serial product. Regarding EMC, tests have shown that some improvements remain to be done. Observed noncompliance especially in the radiated VHF emission domain are due to high frequency currents flowing in the power cable connecting the SCAP bank to the converter. Analysis is still in progress, additional filtering within the converter should decrease high frequency common mode currents at source level. This is the best approach taking into account the difficulties, the additional weight and cost to shield the power cable and the super capacitor bank. VII. Conclusions The bidirectional buck-boost DC-DC converter allows the whole recovery of the energy stored in the SCAP leading to a competitive solution to the H/C engine starting improvement in cold weather conditions. The concept has been validated with a standard super capacitor bank of several hundreds of farad and the development of a 8kW converter successfully tested on bench then at helicopter level. Test results confirm the efficiency provided by multiphase interleaving and synchronous rectification. Further improvements could easily lead to improve the power density by a 10% factor. References [1] M. Gazzino, PB. Lancelevee, “Dispositif et procédé pour le démarrage d’un moteur à turbine d’hélicoptère…“ French Patent n° 09 02942 [2] Benoit Fleury, “Comportement des super condensateurs en environnement sévère et conception optimale d’alimentations hybrides embarquées aérospatiales“ These, 2013, Ecole centrale de Lille. [3] FAIRCHILD SEMICONDUCTOR, “Synchronous buck MOSFET loss calculations” AN-6005 [4] Texas instrument (UNITRODE), “Average current mode control of switching power supplies “AN U-140