Autonomous DC-DC converter for RF energy harvesting

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Autonomous DC-DC converter  for RF energy harvesting


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<resource  xmlns:xsi=""
        <identifier identifierType="DOI">10.23723/1301:2016-5/17796</identifier><creators><creator><creatorName>Salah Adami</creatorName></creator><creator><creatorName>Christian Vollaire</creatorName></creator><creator><creatorName>François Costa</creatorName></creator><creator><creatorName>Bruno Allard</creatorName></creator></creators><titles>
            <title>Autonomous DC-DC converter  for RF energy harvesting</title></titles>
        <resourceType resourceTypeGeneral="Text">Text</resourceType><dates>
	    <date dateType="Created">Wed 21 Dec 2016</date>
	    <date dateType="Updated">Thu 26 Jan 2017</date>
            <date dateType="Submitted">Wed 23 Jan 2019</date>
	    <alternateIdentifier alternateIdentifierType="bitstream">f1aad658314b9ba180da5e2f7321227254b4aa16</alternateIdentifier>
            <description descriptionType="Abstract"></description>

REE N°5/2016 119 URSI FRANCE 2016 DOSSIER 2 Autonomous DC-DC converter for RF energy harvesting Par Salah Adami1 , Christian Vollaire1 , François Costa2 , Bruno Allard3 1 Laboratoire Ampère, CNRS 5005, Ecole Centrale de Lyon, université de Lyon 2 Laboratoire SATIE, CNRS 8029, ENS Cachan, université Paris Est Créteil 3 Laboratoire Ampère, CNRS 5005, INSA de Lyon, université de Lyon Figure 1: Topology of power management system for low power rectenna. Introduction Wireless sensors networks (WSNs) are nowadays ubi- quitous in various kinds of applications like monitoring and control, smart buildings, healthcare, etc. The expansion of WSNs is due, among other reasons, to the efforts made by designers in order to develop low-power circuits. Though those circuits are optimized for low-power and have excellent power budget, the problem of autonomy is still there. In fact, the performances required from an autonomous sensor are growing day by day and likewise for power consumption. In most applications, batteries are used alone in order to sup- ply WSN’s nodes. In this case, the sensor life-time is limited. So, designers begin to use energy harvesting as a support together with batteries. Harvested energy could be used to recharge the batteries or/and to directly power the sensors. In most cases, energy harvesting sources deliver very low voltage level (<1V). However, a level of some volts is needed in order to be able to power conventional circuits as autono- mous sensors. Power management system based on step- up DC-DC converter is used for this purpose. In this paper a start-up converter based on the Armstrong oscillator is used in order to improve the DC voltage sensitivity. Cet article présente une topologie de convertisseur DC-DC utilisable pour des applications de très faible puissance et très basse tension. Cette topologie est spécifique aux sources de récupération d’énergie et plus particulière- ment aux sources d’énergies électromagnétiques ambiantes. Le principal avantage de ce convertisseur est son autonomie : il démarre à des tensions très faibles sans avoir recours à une assistance ou une source d’énergie extérieure. Une approche de modélisation à partir de simulations de type circuit est utilisée pour un dimensionnement optimal basé sur les contraintes d’une source de type rectenna (rectifying antenna) très basse puissance. Enfin, un prototype a été fabriqué et évalué. ABSTRACT URSI FRANCE 2016DOSSIER 2 120 REE N°5/2016 A flyback converter operating in discontinuous conduction mode (DCM) is used to match the output impedance of the rectenna in order to extract the maximum available power. A normally-on P-channel JFET is connected to the low-side of the start-up converter allowing to switch it off once the flyback is operating. An under-voltage lock-out (UVLO) circuit is proposed to manage the operation of the load depending to the available power from the source (figure 1). Rectenna for RF energy harvesting A rectenna is composed of an antenna and a rectifier. For low power UHF applications, the rectifier is very often realized using Schottky diodes thanks to their low threshold voltage and low junction capacitance. A bandpass filter is used between the antenna and the rectifier in order to have the impedance matching to the working frequency. This also allows to avoid high frequency harmonics from the rectifier to be radiated back by the antenna. The output filter is a low- pass filter which allows to cut-off high frequency harmonics from the rectifier [1]. A specific rectenna has been experimentally tested in an anechoic chamber with different levels of RF power PRF (at 2.45 GHz: Wi-Fi frequency) over a wide range of DC resistive load RL [2, 3]. The DC voltage Vdc provided by the rectenna has been measured and the RF/DC power conversion effi- ciency RF/DC has then been evaluated as follows: (1) Current-voltage characteristics are almost parallel straight lines (figure 2). The rectenna can then be modeled as a DC voltage source in series with resistive impedance. Also, as current-voltage characteristics are parallel, the rectenna im- pedance is almost constant over a wide range of RF power levels. The characteristics of efficiency confirm this deduction as the efficiency is maximal for a specific value of the output load. This optimal load Rs (related to maximum efficiency) decreases slightly when RF power increases: Rs = 1200 at -20 dBm and Rs = 800 at -8 dBm. Note that the ambient RF energy available depends on the place where the system is placed and on the surface of the antenna. But we can ima- gine that it is possible to collect a power of -20 dBm with an adapted antenna. Autonomy: start-up converter DC/DC Converters need in general either an auxiliary power supply or a sufficiently high input source voltage in or- der to operate properly. As these two possibilities are absent in our application, a specific converter topology based on the Armstrong oscillator is presented. Armstrong-oscillator converter The Armstrong oscillator is a harmonic oscillator able to exhibit high oscillation levels from very low DC voltage [4, 5, 6]. That way, very-low operation voltage can be achieved. The classic version is using only a two winding transformer and the inherent gate-source diode of the JFET for rectifica- tion. So, the output DC voltage is reversed as regard to the source one. This paper presents a more advanced topology which uses a ternary winding associated with a separate rec- tification diode. The output is then isolated from the source and can be arranged as desired. As shown in figure 1, the converter topology is mainly composed of two components: a transformer and a nor- mally-on N-channel JFET. The operation of the converter is based on three functional blocks. The first one is the oscil- Figure 2: Rectenna characteristics for different RF power levels: Current-Voltage (left) and RF/DC Efficiency-Load. REE N°5/2016 121 Autonomous DC-DC converter for RF energy harvesting lator formed by the primary side of the transformer and the JFET’s gate-source capacitance Cgs (resonant cavity) on the one hand, and the JFET (negative gain amplifier) on the other hand. The second function is a voltage step-up thanks to the transformer high turn-ratio. A high voltage level is needed at the JFET gate to reach the gate-source cutoff voltage, Vgs_th , in order to switch it off (mg 2 = Lg /Lp ). A high voltage is also needed at the tertiary winding output (mr 2 = Lr /Lp ) in order to obtain a high DC voltage. The third functional block is the rectifier, i.e. the diode Dr . As it can be observed from the waveforms in figure 3, Dr is on when the JFET channel and the JFET inherent gate-source diode, Dgs , are conducting. The capacitor Cg is charged nega- tively when Dgs turns on. One may then obtain a high voltage level at the JFET gate. A high resistor value, Rg , is placed in parallel with Cg in order to stabilize the voltage across this capacitor. A complete theoretical modeling study of the basic Armstrong converter has been reported by the authors in [7]. The small signal model developed for the basic version (two-windings) in [6] is still valid for the converter presented in this paper (three- windings). Consequently, the minimum source start-up voltage Vstart-up is expressed by the following relationship [7]: (2) Where IDss and Vgs_th is the zero-gate-voltage drain current and the channel cutoff voltage of the JFET respectively. Experimental tests A prototype of the three-windings start-up converter was designed and fabricated using discrete components. The best commercially available JFET for our current and vol- tage ranges is the J201 device (IDss = 583µA; Vgs_th = -0.6V). The tertiary winding rectification diode is a HSMS2822 de- vice which has been chosen due to its low forward voltage (Vf = 340 mV) and low leakage (< 30nA at -2.5 V) allowing then to reduce conduction losses. The three windings trans- former (Lp = 50 H; mg = 25; mr = 25) was realized using a compact (20 mm x 10 mm x 6 mm) and high frequency (up to 600 kHz) double E-shape ferrite cores. The first step in experimental tests was realized using a rectenna emulation model as described in figure 4. The power conversion efficiency start-up of the converter (figure 5) has then been evaluated using the following expression: Figure 3: Steady-state simulated waveforms for Vs = 200 mV, Rs = 1 k and Rload = 1 M . Primary inductance current i(Lp ), tertiary inductance current i(Lr ) and JFET’s gate-source voltage, vgs . URSI FRANCE 2016DOSSIER 2 122 REE N°5/2016 (3) The efficiency is around 25 % and 10 % for 1 M and 10 M resistive loads respectively. Losses are mainly due the JFET channel resistance, which is modulated by a quasi-sine signal resulting in high conduction losses. One can note from (2) that the start-up converter has an inherent compromise between steady state efficiency and start-up voltage. In fact, (2) shows that for a given source impedance and transformer turn ratio, minimizing Vstart-up (which is targeted here) requires to minimize IDSS , which, by consequence, will increase the conduction losses. The efficiency is then limited due to this inherent characteristic of the Armstrong oscillator. The use of this converter will then be restrained to the start-up phase where a high voltage level is needed to launch the high effi- ciency principal converter. The start-up converter is now tested using an actual 3.9 k source impedance rectenna. The RF power is injected at the input of the rectifier using a RF power source (at 2.36 GHz). The start-up converter is then powered by the rectenna and a 1 M resistive load is used. The input RF power is swept from 25µW (-16 dBm) to 1 mW (0 dBm). Figure 6 shows the converter input and output voltages and the voltage step-up ratio. While the input voltage is almost always under Figure 4: Experimental evaluation of the start-up converter power efficiency, start-up . Figure 5: Experimental start-up converter efficiency vs. input power Figure 6: The start-up converter powered by a rectenna: converter input and output voltages vs. rectenna input power. REE N°5/2016 123 Autonomous DC-DC converter for RF energy harvesting 1 V level, the output one increases to near 8 V at 0 dBm. The voltage step-up ratio varies from 5 to 10. Experimental tests show that the achievable minimal start-up voltage is around 100 mV (equivalent to 200 mV open-circuit voltage) which corresponds to 3.7 µW of source power. Impedance matching converter There are various solutions used to match the impedance of an energy source [8, 9]. One suitable technique for rec- tenna is static resistor emulation using a power electronics converter. As the rectenna impedance is relatively constant, open-loop low-power controller can be considered here. In this section an inductive flyback converter operating in discontinuous-conduction mode (DCM) and optimized for ultra-low power rectenna applications is presented. DCM flyback converter topology and operation The flyback structure and the relative theoretical impor- tant waveforms are shown in figure 1 and figure 8 respec- tively. The MOSFET, M, is controlled in open-loop by an external constant frequency (f), constant duty cycle (dm ) signal. Primary and secondary currents expressions are given by (4) and (5) respectively. (4) (5) Where Lm and Ld are the primary and secondary flyback inductances respectively and T the period of the control si- gnal. The other parameters are given in figure 1 and figure 7. Supposing DCM operation, the flyback input impedance can be calculated as: (6) Supposing a perfect impedance matching between the rectenna and the flyback converter, i.e., Rin = Rs or Vin = Vs /2, the maximal theoretical source power is given by: (7) The duty cycle dd relative to the diode conduction phase can be expressed as a function of dm by considering that the average voltage across Lm during a period is null (figure 8), i.e. dm Vin = dd (Vout \m). This gives the following relation: (8) Using previous relations and supposing perfect impe- dance matching, average (AVG), maximum (MAX) and RMS values of im and id can be calculated (table 1). Figure 7: Schematic DCM Flyback converter waveforms for a constant switching frequency. URSI FRANCE 2016DOSSIER 2 124 REE N°5/2016 Loss overhead As the UVLO represents a high impedance load for the flyback converter, Vout will be considerably high as regard to Vs . For this reason, the turn-ratio, m, will be unity as the flyback structure operating in DCM steps-up sufficiently the input voltage. These assumptions are considered for loss calcula- tion. Also, impedance matching conditions are considered here, i.e. Rin = Rs and Vin = Vs /2. Conduction losses The conductions losses in the MOSFET are due to the current flow through the channel drain-source resistance Rds(on) during the on-state. Furthermore the high-level voltage applied to the MOSFET gate Vg is used as a parameter in the optimization process. The MOSFET conduction losses Pcnd_Mos are given by: (9) During the diode conduction phase, conduction losses are due to the diode forward voltage Vd . These losses can then be evaluated as: (10) Losses due to diode reverse current should also be taken into account. They appear when the diode is reverse-biased (figure 7) and are then given by: (11) where Irev_d is the diode reverse current which depends on Vd . The coupled-inductances conduction losses are due to the resistive parts of the primary and secondary inductances RLm and RLd ) ; they are given by: (12) In this realization, it has been calculated that the cou- pled-inductances magnetic core loss can be neglected as the selected core never saturates for the power levels under consideration. Switching losses There are two kinds of MOSFET switching losses during the channel switching-off event. The first one is due to the time delay of the channel to switch-off. During this short pe- riod (tOFF ) the product of the drain-source voltage Vds and the drain-source current im is not null. In fact, there is a triangle formed by the variation of im from im_MAX to 0 and the variation of vds from 0 to its maximum value: vds_MAX = Vin + Vout /m. The expression of these switching losses is given by: (13) The second kind of MOSFET switching losses is caused by the drain-source stray capacitor Coss . During the channel switch-off event, this capacitor is charged from 0 to vds_MAX . The expression of these losses is given by: (14) At the diode level the same kind of phenomenon hap- pens during the diode switching-off event. The diode junc- tion capacitor Cj is then charged from 0 to mVin + Vout. The expression of Psw_Cj is given by: (15) Controller losses The consumption of the controller circuit can be expressed as the product of its supply voltage level Vg by the quiescent current ictrl_Q drawn from the power supply. (16) This expression considers only the controller quiescent consumption; the MOSFET driver requirements will be consi- dered separately. As the controller drives the MOSFET gate, there are swit- ching losses due to the total gate charge Qg which depends on the gate voltage Vg . Driver losses due to Qg are expressed using the gate equivalent capacitor Cgin = Qg /Vg and they are given by: (17) Table 1: Average, maximum and RMS² expressions of the MOSFET and diode currents (im and id ). REE N°5/2016 125 Autonomous DC-DC converter for RF energy harvesting Efficiency definition Two expressions of the converter efficiency are conside- red: for which only internal converter losses are considered and for which controller losses PCtrl = PCtrl_Q + PDriv are included. (18) (19) Where PMos = Pcnd_Mos +Psw_toff + Psw_Coss , PDiode = Pcnd_d + Psw_Cj + Prev_d and PInd =Pcnd_ind . Design of the flyback converter Based on the low-current rectenna characteristics, the selected MOSFET is the FDV301N and the diode is the HSMS2822 device. Table 2 depicts the main parameters of the two devices. As the diode is most of the time reverse- biased, the low value of Irev_d < 30 nA, will contribute in the reduction of conduction losses. The efficiency and the primary inductance Lm (from (6)) have been evaluated as a function of the switching frequen- cy, f (figure 8). One can observe that switching frequency impacts considerably on the global efficiency especially at low power levels. Gate driving represents the most impor- tant contribution in switching losses. A switching frequency, f = 10 kHz and an inductance value, Lm = 30 mH, have been selected in order to obtain a correct efficiency at µW levels. Figure 9 shows calculated efficiency according to control- ler supply voltage, Vg . One can observe that 1.2 V is a good trade-off between conduction and switching losses. The turn-ratio is unity as the flyback structure operating in DCM steps-up sufficiently the input voltage. Moreover, when the converter output voltage is high with regard to the input one, the secondary winding conduction time dd T is very short as regard to the primary winding one dm T as shown by figure 9. As a consequence, the designed coupled inductances Table 2: Selected MOSFET and Schottky Diode for the Flyback Converter. Figure 8: Calculated global flyback converter efficiency, , and primary inductance, Lm , according to the switching frequency f (dm = 0.5). URSI FRANCE 2016DOSSIER 2 126 REE N°5/2016 should have a broadband frequency capability in order to avoid current distortions and then additional losses. A pro- totype was fabricated and tested. The selected magnetic is a compact (20 mm x 10 mm x 6 mm) double E ferrite core with a broad-band frequency (>100 kHz for the final cou- pled-inductances). The controller is a TS3001 commercial integrated circuit oscillator. When it drives the FDV301N switch (at f = 10 kHz), it consumes 1.44 µW under 1.2 V supply voltage. Experimental results Experimental tests in anechoic chamber are realized as detailed in figure 10. A 2.45 GHz RF source coupled to a horn antenna (gain Gemit = 20 dBi) are used for the transmission side. At the receiver side, a rectifier coupled to a compact antenna (gain Grecv = 6 dBi) is used (Section II). The trans- mission distance is d = 1 m. The flyback converter is powe- red by the rectenna and a 200 k resistive load is placed at its output. The controller is powered by an auxiliary power source Vg = 1.2 V. The received RF power at the rectifier input can be evalua- ted using the Friis equation [10] as follows: (20) Where is the wavelength relative to the 2.45 GHz RF signal. The input voltage VRect_out , input current IFly_in and output voltage VFly_out of the flyback converter are measured for dif- ferent RF power levels. The efficiency of the flyback converter alone , and the efficiency of the flyback converter in- cluding the controller, , are then evaluated as follows: (21) (22) Figure 11 shows the voltage delivered by the rectenna, VRect_out , and the one delivered by the flyback converter, VFly_out , according to the RF received power Precv . Though VRect_out is limited to 250 mV, the flyback output voltage VFly_out reaches Figure 9: Calculated global flyback converter efficiency, , versus the controller supply voltage Vg . Parameters: f = 10kHz, dm = 0.5 and Lm = 30 mH. Figure 10: Experimental anechoic chamber test of the flyback converter. Figure 11: Flyback converter input and output voltages versus the RF power Precv (RLoad = 200 k .). REE N°5/2016 127 Autonomous DC-DC converter for RF energy harvesting 1 V at -15 dBm and 2.5 V at -10 dBm, which corresponds to a voltage step-up ratio of 10. Figure 12 shows the efficiencies of the flyback converter. The converter global efficiency including controller consumption is over 50% at -15 dBm and reaches 75% at -10 dBm. The rectenna output power, Prect_max , with a 1600 load has been evaluated separately. We define the impedance matching effectiveness, and the global receiver efficiency, , as follows: (23) (24) The impedance matching using the flyback converter shows excellent effectiveness, i.e. more than 89 %. Separate tests using a constant resistance source shows an effecti- veness superior to 99 %. The receiver is operational from -18 dBm of RF received power and reaches a global PCE of 30 % at 0 dBm. Complete system The objective of this section is to present a system which allows a coordinated operation between the start-up and the flyback converters toward an autonomous power supply. In [5] a low power UVLO circuit using two comparators in order to set a lower and an upper threshold voltage is pres- ented. The circuit proposed here is making use of MOSFETs ra- ther than comparators to set the threshold voltages (figure 1). A P-channel MOSFET associated with the resistor, Rp , is used as a switch between the input and the output ports of the UVLO. A diode Dhold and a capacitor Chold are added in order to stabilize the gate-source voltage of NMOS1. Once the output capacitor reaches the high voltage limit, the UVLO connects the capacitor to the output load. The switch NMOS2 allows to keep the PMOS in on state till the low voltage limit is reached. Experimental tests of the UVLO with the start-up converter are shown in figure 13. Measurements show that high and low limit voltages are 1.3 V and 0.65 V respectively. The load operation time is lower than the charging time of Cout (0.5 s and 2.2 s respec- tively), which means that the source power level is inferior to the power needed by the load. Now we present a structure which will permit us to connect both converters in order to work with the start-up converter at the beginning and then with the flyback conver- ter as the main converter (figure 14). Figure 15: at the initial step, the capacitor Cout is empty, so the UVLO output voltage Vout_L is null and the start-up converter is working. By time going on, the capacitor Cout is charged until it is reaching the Vhigh voltage value. At that time,the UVLO is closing its circuit and Vout_L gets the same value than Vout . At this moment, two factors come into play. On one hand, the P-JFET Normally-on has a positive voltage, Vgs > Vth_PJFET , so it will open the start-up circuit. On another hand, the input Figure 12: Efficiencies and impedance matching effectiveness according to the received RF power Precv . Figure 13: Experimental tests: UVLO input and output voltages with: NMOS1/2 = FDV301N, PMOS = FDV304P, R1 = 25 M , R2 = 10 M , Rp = 10 M , Vs = 800 mV, Rs = 2.4 k , Cout = 4.7 µF and RLoad = 100 k . URSI FRANCE 2016DOSSIER 2 128 REE N°5/2016 voltage of the controller will be obtained after decrease of Vout_L by the voltage regulator. In this way, we can guarantee that the oscillator will work in its correct working voltage and will be able to start the flyback converter. Thereafter, it will be self-powered by the main converter. Conclusion In this paper, a complete power management system for RF energy harvesting in WPT scheme was presented. The sys- tem is composed by two main elements: a start-up and a fly- back converter. The presented start-up converter based on the Armstrong oscillator achieves cold start-up as low as 100 mV (200 mV open circuit) at ultra-low power (3.7 µW). The flyback converter operating in DCM achieves a conversion efficiency over 50 % at 9 µW and a peak efficiency of 84 % at 370 µW, with an impedance matching effectiveness over 89 %. Finally, an UVLO circuit is proposed to manage the operation of the load as function of the available power from the source. Figure 14: Coupling structure. Figure 15: Voltages in the complete circuit (Rload = 200 k ) REE N°5/2016 129 Autonomous DC-DC converter for RF energy harvesting Citations [1] V. Marian, B. Allard, C. Vollaire, and J. Verdier, “Strategy for Microwave Energy Harvesting From Ambient Field or a Feeding Source,” Power Electron. IEEE Trans., vol. 27, no 11, pp. 4481-4491, 2012. [2] V. Marian, S.-E. Adami, C. Vollaire, B. Allard, and J. Verdier, “Wireless Energy Transfer Using Zero Bias Schottky Diodes Rectenna Structures,” Adv. Mater. Res., vol. 324, pp. 449- 452, Oct. 2011. [3] W. Haboubi, H. Takhedmit, J.-D. Lan Sun Luk, S.-E. Adami, B. Allard, F. Costa, C. Vollaire, O. Picon, and L. Cirio, “An Efficient Dual-Circularly Polarized Rectenna for RF Energy Harvesting in the 2.45 GHz ISM Band,” Prog. Electromagn. Res., vol. 148, pp. 31-39, 2014. [4] E. Armstrong, “Some recent developments in the audion receiver,” Proc. Inst. Radio Eng., vol. 3, pp. 244-260, 1915. [5] E. H. Armstrong, “Patent US 1113149, A Wireless receiving systems,” 1914. [6] S. Adami, N. Degrenne, W. Haboubi, H. Takhedmit, D. Labrousse,F.Costa,B.Allard,J.Daniel,L.Sun,L.Cirio,O.Picon, and C. Vollaire, “Ultra-Low Power, Low Voltage , Self-Powered Resonant DC – DC Converter for Energy Harvesting,” J. Low Power Electron., vol. 9, no 1, pp. 103-117, 2013. [7] S.-E.Adami,V.Marian,N.Degrenne,C.Vollaire,B.Allard,and F. Costa, “Self-powered ultra-low power DC-DC converter for RF energy harvesting,” in 2012 IEEE Circuit and Systems Societ, FTFC (Faible Tension Faible Consommation), 06- 08 jun 2012, Paris (France), pp. 1-4. [8] T. Esram, “Comparison of Photovoltaic Array Maximum Power Point Tracking Techniques,” IEEE Trans. Energy Convers., vol. 13, no 2, pp. 1065-449, Jun. 2007. [9] N. Kong and D. Ha, “Low-power design of a self-powered piezoelectric energy harvesting system with maximum power point tracking,” Power Electron. IEEE Trans., vol. 27, no 5, pp. 2298-2308, 2012. [10] T. Umeda, H. Yoshida, S. Sekine, Y. Fujita, T. Suzuki, and S. Otaka, “A 950-MHz Rectifier Circuit for Sensor Network Tags With 10-m Distance,” IEEE J. Solid-State Circuits, vol. 41, no 1, pp. 35-41, 2006. [11] G. D. Szarka, S. G. Burrow, and B. H. Stark, “Ultralow Power, Fully Autonomous Boost Rectifier for Electromagnetic Energy Harvesters,” IEEE Trans. Power Electron., vol. 28, no 7, pp. 3353–3362, 2013. LES AUTEURS Salah-Eddine Adami received the engineer diploma in Electrical Engineering and the M.S. degrees in electronic from the Institut National des Sciences Appliquées de Lyon (INSA de Lyon, France) in 2010. He received his Ph.D. degree in electrical engineering in 2013, at the Ampere Laboratory (CNRS 5005) of Ecole Centrale de Lyon, France. His current research interests include RF energy scaven- ging, efficient low-power low-voltage power electronics for energy harvesting systems. François Costa received the Ph.D. in electrical enginee- ring from university of Paris-Sud, Orsay, France, in 1992. He is also a full professor at the Institut universitaire de for- mation des maîtres de Créteil, university Paris-Est Créteil, France, where he is responsible for the master in teaching sciences & technology. Since 1999, he is the leader of the Power Electronics Team in SATIE laboratory (SATIE, CNRS 8029). His research concerns high-frequency medium- power converters, the EMI issues and their modelling, the HF instrumentation, the integration in power electronics, and the piezoelectric converters. Bruno Allard received the M.Sc. and Ph.D. degrees in engineering from the Institut National des Sciences Appliquées de Lyon (INSA Lyon), Lyon, France, in 1988 and 1992, respectively. He is currently a full professor at Ampère laboratory (CNRS 5005), in Lyon, France. His re- search interests include the integration of 3D power sys- tems and low-power monolithic converter design. He has led numerous industrial and academic projects. Christian Vollaire received his M.S. degree in electrical engineering from the university of Saint Jérôme in Marseille (France) in 1992 and his PhD degrees in electrical engi- neering from the Ecole Centrale de Lyon (France) in 1997. From 1997 to 1998, he worked as a graduate research assistant at the Ecole Centrale de Lyon. In 1998, he joined the Ampère laboratory (CNRS 5005). Since, he carries out his research with AMPERE at the Ecole Centrale de Lyon in the field of the numerical modelling applied to the interac- tion between electromagnetic field and complex systems. He notably develops specific formulations and numerical methods for the computation of electromagnetic fields in complex structures. One of the fields of applications relates to electromagnetic compatibility.