Jean-Luc Leray

Portrait de Jean-Luc Leray

Information de base

Prénom
Jean-Luc
Nom
Leray
Entreprise
CEA
Linkedin
Jean-Luc LERAY

Jean-Luc LERAY

  • Headline : Chairman of the Committee chez Grand Prize-GRAND PRIX DE L'ELECTRONIQUE "Général Ferrié"
  • Location : France
  • Industry : Research
  • Summary : - Engineering degree in Physics and Engineering (Master level, Ecole Centrale de Paris, 1978) and a Dr d'Etat es Sciences degree (PhD) in Microelectronics from Paris University (Orsay, 1989); - >130 publications in peer-refereed Journals (ISI, h.index=19, Ncit=1050); >200 publications and communications in Proceedings and other media and 1 patent on SOS/SOI microelectronics technologies(eg Silicon-On-Insulator). - I have been awarded a national grand prize “Général FERRIÉ” for radiation hardening of microelectronics technologies (1994) ; Academic palms (1995) ; IEEE Fellow for contribution to Silicon On Insulator technologies development (2004) and SEE Fellow (2006) - I became a Research Director at CEA, the French Atomic and Alternative Energy Commission, having been active in the field for 35 years in Radiation Effects and Micro-Nanoelectronics development ; Adviser of Technologies (IT, Information Technologies, MNT, Micro-NanoTechnologies) to the French High Commissioner of Atomic Energy in 2005 ; Named International Expert (Engineering Fellow) at CEA(2009). - I have been teaching ExperimentaI Nuclear Physics at undergraduate level (Ecole Centrale de Paris) for 10 years in the 80's ; teaching Microelectronics and Radiations Effects in components and systems at Paris XI University in the 90s at the graduate level; Since the 80's teaching Courses on Radiation Effects on Electronics at Conferences in France and abroad, and regularly at Continuing Education Sessions. - Now teaching graduate courses of electronics in MASTER2 at ESPCI and UPMC (Instrumentation) and Nuclear Fusion diagnostics (INSTN) ; - Currently elected member of the IEEE/Nuclear and Plasma Sciences Society (NPSS) AdCOM, chair of the NPSS Transnational Committee (2008-2012) ; past elected V.P., IEEE France Section (2008-2011) ; - Chapter Chair (Electronic Components, since 2007) and Awards and Grades Committee Vice-President at the French National Society of Electronics and Electricity (SEE) ;
  • Specialties : - Last Book: "Micro-Nanotechnologies. Enjeux et Mutations", sous la direction de : JL.Leray , JC.Boudenot, J.Gautier, issued 23/01/2009, ISBN : 978-2-271-06829-3, 15 x 23 - 498 p - Another Book: "A Review of Buried Oxides Structures and SOI Technologies", by JL. Leray, Chap. 2 and "Defects and Radiation-Induced Charge Trapping Phenomena in Silica", by P.Paillet and JL.Leray, Chap. 11 in "Instabilities in silicon devices ", Editors G. Barbottin, A. Vapaille, vol. 3 - Elsevier 1999 - 933 pages
  • Interests : Theoretical and Applied Physics, Antropological History, Ancient Music, Scuba Diving, Hiking/Trekking
  • Public Profile Url : http://www.linkedin.com/pub/jean-luc-leray/14/b68/801

Historique

Utilisateur du site depuis
4 années 5 semaines